参考评论区大佬们的修改

`timescale 1ns/1ns

module gray_counter(
   input   clk,
   input   rst_n,

   output  reg [3:0] gray_out
);
    //使用Moore状态机实现
    parameter   s0 =5'b0000_0,
                s1 = 5'b0001_1,
                s2 = 5'b0011_0,
                s3 = 5'b0010_1,
                s4 = 5'b0110_0,
                s5 = 5'b0111_1,
                s6 = 5'b0101_0,
                s7 = 5'b0100_1,
                s8 = 5'b1100_0,
                s9 = 5'b1101_1,
                s10 = 5'b1111_0,
                s11 = 5'b1110_1,
                s12 = 5'b1010_0,
                s13 = 5'b1011_1,
                s14 = 5'b1001_0,
                s15 = 5'b1000_1,
    
                ss0 = 5'b0000_1,
                ss1 = 5'b0001_0,
                ss2 = 5'b0011_1,
                ss3 = 5'b0010_0,
                ss4 = 5'b0110_1,
                ss5 = 5'b0111_0,
                ss6 = 5'b0101_1,
                ss7 = 5'b0100_0,
                ss8 = 5'b1100_1,
                ss9 = 5'b1101_0,
                ss10 = 5'b1111_1,
                ss11 = 5'b1110_0,
                ss12 = 5'b1010_1,
                ss13 = 5'b1011_0,
                ss14 = 5'b1001_1,
                ss15 = 5'b1000_0;
    
    reg [4:0] s,nx_s;//state,next_state
    
    always@(posedge clk or negedge rst_n)begin
        if(rst_n == 0)
            s <= s0;
        else
            s <= nx_s;
    end
    
    always@(*)begin
        case(s)
            s0:nx_s = ss0;
            ss0:nx_s = s1;
            
            s1:nx_s = ss1;
            ss1:nx_s = s2;
            
            s2:nx_s = ss2;
            ss2:nx_s = s3;
            
            s3:nx_s = ss3;
            ss3:nx_s = s4;
            
            s4:nx_s = ss4;
            ss4:nx_s = s5;
            
            s5:nx_s = ss5;
            ss5:nx_s = s6;
            
            s6:nx_s = ss6;
            ss6:nx_s = s7;
            
            s7:nx_s = ss7;
            ss7:nx_s = s8;
            
            s8:nx_s = ss8;
            ss8:nx_s = s9;
            
            s9:nx_s = ss9;
            ss9:nx_s = s10;
            
            s10:nx_s = ss10;
            ss10:nx_s = s11;
            
            s11:nx_s = ss11;
            ss11:nx_s = s12;
            
            s12:nx_s = ss12;
            ss12:nx_s = s13;
            
            s13:nx_s = ss13;
            ss13:nx_s = s14;
            
            s14:nx_s = ss14;
            ss14:nx_s = s15;
            
            s15:nx_s = ss15;
            ss15:nx_s = s0;
        endcase
    end
    
    always@(*)begin
        gray_out <= s[4:1];
    end
endmodule