题解 | 移位运算与乘法

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
reg [7:0] din;
reg [1:0] cnt;

//cnt
always @ (posedge clk or negedge rst) begin
    if (rst == 0) begin
        cnt <= 2'd0;
        din <= 8'd0;
        input_grant <= 1'd0;
    end
    else if (cnt == 2'd0) begin
        cnt <= 2'd1;
        din <= d;
        input_grant <= 1'd1;
    end
    else if (cnt == 2'd3) begin
        cnt <= 2'd0;
    end
    else begin
        cnt <= cnt + 1;
        input_grant <= 0;
    end
end

//out
always @ (posedge clk or negedge rst) begin
    if (rst == 0) begin
        out <= 11'd0;
    end
    else case (cnt)
        2'd0 : out <= d;
        2'd1 : out <= (din<<2) - din;
        2'd2 : out <= (din<<3) - din;
        2'd3 : out <= (din<<3) ;
    endcase
end
//*************code***********//
endmodule