题解 | #移位运算与乘法#

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
reg [1:0] cnt;
reg [7:0] din;//din是7位
//first
always@(posedge clk or negedge rst)begin
    if(!rst)
        cnt <= 1'b0;
    /*    
    else if ( cnt == 2'd3)
        cnt <= 1'b0;
    */
    else
        cnt <= cnt + 1'b1;//服了服了，你为啥不加1
end
/*//third
always@(posedge clk or negedge rst)begin
    if (!rst)
        input_grant <= 1'b0;
    else begin
        case(cnt)
            2'd0:
                input_grant <= 1;
            default:input_grant <=0;
        endcase
    end
end
*/
//third
always@(posedge clk or negedge rst) begin
    if(!rst) begin
        din <= 1'b0;
        out <= 1'b0;
        input_grant <= 1'b0;
    end
    else begin
        case(cnt)
            2'd0:begin
                din <= d;
                out <= d;
                input_grant <= 1'b1;
            end
            2'd1:begin
                out <= (din<<2)-din;
                input_grant <= 1'b0;
            end   
            2'd2:begin
                out <= (din<<3)-din;
                input_grant <= 1'b0;
            end 
            2'd3:begin//这里是3不是1，以后别复制了
                out <= (din<<3);
                input_grant <= 1'b0;
            end 
        endcase
    end
end


//*************code***********//
endmodule