有参考前辈内容

`timescale 1ns/1ns

module calculation(
	input  clk,
	input  rst_n,
	input  [3:0] a,
	input  [3:0] b,
    output [8:0] c           //加法位宽要加一
	);
    reg [3:0] one=12;
    reg [3:0] two=5;
    wire [8:0] c0,c1;   
    
    mult u0(
        .clk(clk),
        .rst_n(rst_n),
        .a(a),                     //可改变顺序
        .b(one),                   
        .c(c0)
    );
    mult u1(
        .clk(clk),
        .rst_n(rst_n),
        .a(two),
        .b(b),
        .c(c1)
    );
    assign c=c0+c1;  
endmodule

module mult(
    input  clk,
	input  rst_n,
	input  [3:0] a,
    input  [3:0] b,
    output reg [7:0] c                    //乘法位宽为最大数位宽的两倍
	);
    reg [7:0] res0,res1,res2,res3;
    always@(posedge clk or negedge rst_n) begin
        if(!rst_n) begin
            res0<='d0;
            res1<='d0;
            res2<='d0;
            res3<='d0;
            c<='d0;
        end
        else begin
            res0<=a[0]? b : 'd0;           //参考4*4乘法的竖式运算流程,乘数被乘数位置不重要,知道如何拼接即可
            res1<=a[1]? {b, 1'b0} : 'd0;
            res2<=a[2]? {b, 2'b0} : 'd0;
            res3<=a[3]? {b, 3'b0} : 'd0;
            c<=res0+res1+res2+res3;
        end
    end
endmodule