`timescale 1ns/1ns
module function_mod(
	input [3:0]a,
	input [3:0]b,
	
	output [3:0]c,
	output [3:0]d
);

assign c = drev(a);
assign d = drev(b);

function [3:0] drev;//默认为寄存器型,因为需要在函数间传输
	input [3:0] din;
	begin
		drev[0] = din[3];
		drev[1] = din[2];
		drev[2] = din[1];
		drev[3] = din[0];
	end
endfunction

//assign c = drev(a);
//assign d = drev(b);

endmodule