alt

`timescale 1ns/1ns
module lca_4(
    input [3:0] A_in,
    input [3:0] B_in,
    input C_1,

     output CO,
    output [3:0] S
);
    wire [3:0] Gi,Pi,C_temp;
    
    assign Gi = A_in & B_in;
    assign Pi = A_in ^ B_in;
    
    assign S[0] = Pi[0] ^ C_1;
    assign S[3:1] = Pi[3:1] ^ C_temp[2:0];
        
    assign C_temp[0] = Gi[0]|(Pi[0]&C_1);
    assign C_temp[3:1] = Gi[3:1]|(Pi[3:1]&C_temp[2:0]);
    assign CO = C_temp[3];
    
endmodule