`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);

wire  [3:0] p;
wire  [3:0] g;
wire  [3:0] c;

genvar i;
generate 
	for (i=0;i<4;i=i+1) begin:pg_4
	pg_gen pg(
		.a(A_in[i]),
		.b(B_in[i]),
		.p(p[i]),
		.g(g[i])
	);
	end
endgenerate

assign c[0] = g[0] | p[0]&C_1;
assign c[1] = g[1] | p[1]&c[0];
assign c[2] = g[2] | p[2]&c[1];
assign c[3] = g[3] | p[3]&c[2];
assign S[0] = p[0]^C_1;
assign S[1] = p[1]^c[0];
assign S[2] = p[2]^c[1];
assign S[3] = p[3]^c[2];
assign CO = c[3];

endmodule

module pg_gen(
	input  a,
	input  b,
	output p,
	output g
);

assign  g =a&b;
assign  p =a^b;

endmodule