题解 | #异步复位同步释放#

`timescale 1ns/1ns

module ali16(		
input clk,
input rst_n,
input d,
output reg dout
 );

reg		rst_n0,	rst_n1;     //	异步复位，同步释放
//*************code***********//
always@(posedge clk or negedge rst_n)		begin			//	打两拍，来消除 亚稳态
	if(!rst_n)	begin
		rst_n0		<= 0;
		rst_n1		<= 0;
		end
	else	begin
		rst_n0		<= rst_n;
		rst_n1		<= rst_n0;
		end
end

always@(posedge clk or negedge rst_n1)		begin
	if(!rst_n1)
		dout		<= 0;
	else
		dout		<= d;
end

//*************code***********//
endmodule