和根据状态转移写状态机-三段式相比,就是将输出块和次态切换块合并。
`timescale 1ns/1ns
module fsm2(
input wire clk ,
input wire rst ,
input wire data ,
output reg flag
);
//*************code***********//
parameter S0=0, S1=1, S2=2, S3=3, S4=4;
reg [2:0] state, nstate;
always@(posedge clk or negedge rst) begin
if(~rst)
state <= S0;
else
state <= nstate;
end
always@(*) begin
if(~rst) begin
nstate = S0;
flag = 0;
end
else
case(state)
S0: begin
nstate = data? S1: S0;
flag = 0;
end
S1: begin
nstate = data? S2: S1;
flag = 0;
end
S2: begin
nstate = data? S3: S2;
flag = 0;
end
S3: begin
nstate = data? S4: S3;
flag = 0;
end
S4: begin
nstate = data? S1: S0;
flag = 1;
end
default: begin
nstate = S0;
flag = 0;
end
endcase
end
//*************code***********//
endmodule